Metal Fill

 

In this article, we will talk about metal fill, a technique used to fix the critical design for manufacturability (DFM) issue, metal over-etching.


DFM is required to reduce the possibility of damage to the individual chip during manufacturing, i.e., to increase the yield. One of the many issues that can occur during manufacturing is metal over-etching which is taken care of during DFM.


Metal over-etching occurs in regions of the chip having low wire density. When there is high metal density, the tool evenly distributes the etching effort over the metal. But when there are only a few wires, the tool will concentrate the etching effort on this small piece of metal. This can sometimes even cause the entire metal to be etched away. This issue can be solved using the metal fill technique.


Minimum metal density rules are applied to prevent metal over-etching from occurring. Adding metal fill can help meet these rules. Empty tracks remaining after routing get filled with floating metal wires. This ensures that metal density is even across the specific region of the chip. Now the tool can distribute the etching concentration to the floating metal fill wires and the routes(signal, clock, or power routes). After the metal fill, there won't be any empty metal tracks remaining, so apply metal fill only after fixing all routing DRCs. 


The below images show a routed region of the chip before and after applying metal fill. The first image represents the actual signal routing and empty metal tracks. In the second image, the empty tracks get filled with metal wires. Observe how in the first diagram, there is a small piece of wire at the top without many surrounding wires. The tool will concentrate on etching this piece of metal only. In the region of high density in the image, the etching concentration will be even. Note that these images are just an illustration used to explain the concept clearly, not what an actual chip looks like. The routing scenario is different in real life.


Fig 1. Before Metal Fill
Fig2. After Metal Fill

Adding metal fill can cause additional timing violations. These get fixed during post-layout STA.


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