Clock skew is the difference in the arrival time of the clock signal at different sequential components within a digital system. The consequences of having a large amount of clock skew are timing violations, reduced setup and hold margins and crosstalk. Chip designers attempt to minimize clock skew in the design through the process of clock tree synthesis(CTS).
However in some cases clock skew can actually help fix setup and hold violations. This is called useful skew.
This blog post aims to provide a comprehensive understanding of useful clock skew.
Positive and Negative Clock Skew
Useful skew can be classified as positive and negative skew.
Positive skew causes a delay in the arrival of the clock signal at the destination sequential element i.e. capture flip-flop. It can help fix setup violations but it worsens hold slack. So we should be careful not to cause hold violations when using the technique of deliberately adding positive skew to fix a setup violation.
Negative clock skew causes a delay in the arrival of the clock signal at the source sequential element i.e. launch flip-flop. Using negative skew, we can fix hold violations but it makes setup slack worse.
Consequences of zero clock skew
Zero clock skew may not be helpful in closing the timing of the design. Additionally, it can cause a huge amount of dynamic power in the design.
When the clock skew is zero it means that the clock signal arrives at every sequential element in the design at the same time. This causes all of the sequential components to switch at once. A huge amount of current has to be drawn from the source resulting in high dynamic power dissipation and damage to the power grid. So zero-skew is not a desirable outcome.
Conclusion
In conclusion, clock skew is something that gives both good and bad results in digital systems. While it can enhance performance, timing, and energy efficiency, it can also introduce challenges and risks. By striking a balance between the benefits and drawbacks of clock skew and employing effective design and calibration practices, we can harness its positive potential while mitigating its negative impacts.
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